TEQ
TEQ Rn, #imm
arm_a32 ARM_A32 DataProc
A32_TEQ_IMM
Encoding
| encoding_kind | ARM_A32 |
| size_bits | 32 |
| variant | a32 |
| instr_word_bits | 32 |
| fixed_bits | E3300000 |
| fixed_mask | FFF00000 |
| cond_field | [31:28] |
| set_flags | True |
Operands (2)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | Rn | REG | GPR | d (32b) | R | EXPLICIT | bits[19:16] |
| 1 | imm12 | IMM | w (12b) | R | EXPLICIT | bits[11:0] |
Flag effects (4)
N = WRITE
Z = WRITE
C = WRITE
V = WRITE
Micro-ops sequence (2)
Ordered sequence of primitive operations the emulator dispatches. Ghidra-p-code-style — INTRINSIC escapes arch-specific ops that don't decompose cleanly.
- 0 INT_XOR tmp ← (Rn, imm12) 32b
- 1 INTRINSIC set_nzcv_from_result (tmp)