BX
BX Rm
arm_t16 ARM_T16 Thumb branch indirect side_effects
T16_BX
Encoding
| encoding_kind | ARM_T16 |
| size_bits | 16 |
| variant | t16 |
| instr_word_bits | 16 |
| fixed_bits | 00004700 |
| fixed_mask | 0000FF87 |
| set_flags | False |
Operands (1)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | Rm | REG | GPR | d (32b) | R | EXPLICIT | bits[6:3] |
Register effects
PC W (implicit)
Context dependencies
SLEIGH-style: this encoding only matches when these context variables hold the required values.
T = 1
Micro-ops sequence (1)
Ordered sequence of primitive operations the emulator dispatches. Ghidra-p-code-style — INTRINSIC escapes arch-specific ops that don't decompose cleanly.
- 0 BRANCHIND (Rm)