SH
SH rt, rs, #imm16
rsp RSP_SCALAR Scalar
RSP_SH
Encoding
| encoding_kind | RSP_SCALAR |
| size_bits | 32 |
| op6 | 29 |
| imm_kind | I |
| op_kind | scalar |
| fixed_bits | A4000000 |
| fixed_mask | FC000000 |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | rt | REG | GPR | d (32b) | W | EXPLICIT | bits[20:16] |
| 1 | rs | REG | GPR | d (32b) | R | EXPLICIT | bits[25:21] |
| 2 | imm16 | IMM | w (16b) signed | R | EXPLICIT | bits[15:0] |
Micro-ops sequence (1)
Ordered sequence of primitive operations the emulator dispatches. Ghidra-p-code-style — INTRINSIC escapes arch-specific ops that don't decompose cleanly.
- 0 STORE rt ← (rs, imm16) 32b