VXOR
VXOR vd, vs, vt[e]
rsp RSP_VECTOR Vector
RSP_VXOR
Encoding
| encoding_kind | RSP_VECTOR |
| size_bits | 32 |
| op6 | 12 |
| funct6 | 2C |
| imm_kind | VEC |
| op_kind | vector |
| fixed_bits | 4A00002C |
| fixed_mask | FE00003F |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | vd | REG | VPR | x (128b) | W | EXPLICIT | bits[10:6] |
| 1 | vs | REG | VPR | x (128b) | R | EXPLICIT | bits[15:11] |
| 2 | vt | REG | VPR | x (128b) | R | EXPLICIT | bits[20:16] |
| 3 | e | VECTOR_ELEMENT | b (4b) | R | EXPLICIT | bits[24:21] |
Micro-ops sequence (1)
Ordered sequence of primitive operations the emulator dispatches. Ghidra-p-code-style — INTRINSIC escapes arch-specific ops that don't decompose cleanly.
- 0 INTRINSIC vxor vd ← (vs, vt, e) — bitwise XOR