ANDN
REG0=GPR64_R():w:q:i64 REG1=GPR64_N():r:q:i64 REG2=GPR64_B():r:q:i64
x86_64 X86_LEGACY BMI1 APX_F_BMI1 source: xed
XED_ANDN_GPR64i64_GPR64i64_GPR64i64_APX
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 00 |
| opcode_map | ONEBYTE |
| mandatory_prefix | F2 |
| has_modrm | True |
| vex_l | 0 |
| requires_mode | long |
| exception_class | APX-EVEX-BMI |
| cpl | 3 |
| raw_encoding | EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 UBIT=1 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | q | R | EXPLICIT | MODRM_REG | |
| 2 | REG2 | REG | q | R | EXPLICIT | MODRM_REG |
Flag effects (2)
CF = SET_0
OF = SET_0
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.