BLENDPD

REG0=XMM_R():rw:dq:f64 MEM0:r:dq:f64 IMM0:r:b REG0=XMM_R():rw:dq:f64 REG1=XMM_B():r:dq:f64 IMM0:r:b

x86_64 X86_LEGACY SSE SSE4 source: xed

XED_BLENDPD_X86_LEGACY_0F3A_0D_461943

Encoding

encoding_kindX86_LEGACY
opcode_bytes0D 0F 3A 0D
opcode_map0F3A
mandatory_prefix-
has_modrmTrue
imm_size_bytes1
attributesREQUIRES_ALIGNMENT
exception_classSSE_TYPE_4
cpl3
raw_encoding0x0F 0x3A 0x0D osz_refining_prefix REFINING66() MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() 0x0F 0x3A 0x0D osz_refining_prefix REFINING66() MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (6)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG f64 RW EXPLICIT MODRM_REG
1 MEM0 MEM f64 R EXPLICIT MODRM_RM
2 IMM0 IMM b R EXPLICIT IMM
3 REG1 REG f64 RW EXPLICIT MODRM_REG
4 REG2 REG f64 R EXPLICIT MODRM_REG
5 IMM1 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.