BSR

REG0=GPRv_R():cw MEM0:r:v REG0=GPRv_R():cw REG1=GPRv_B():r REG0=GPRv_R():cw MEM0:r:v REG0=GPRv_R():cw REG1=GPRv_B():r

x86_64 X86_LEGACY BITBYTE I386 source: xed

XED_BSR_X86_LEGACY_0F_BD_708128

Encoding

encoding_kindX86_LEGACY
opcode_bytesBD 0F BD 0F BD 0F BD
opcode_map0F
mandatory_prefix-
has_modrmTrue
cpl3
raw_encoding0x0F 0xBD not_refining_f3 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() 0x0F 0xBD not_refining_f3 MOD[0b11] MOD=3 REG[rrr] RM[nnn] 0x0F 0xBD refining_f3 LZCNT=0 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() 0x0F 0xBD refining_f3 LZCNT=0 MOD[0b11] MOD=3 REG[rrr] RM[nnn]

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG CW EXPLICIT MODRM_REG
1 MEM0 MEM v R EXPLICIT MODRM_RM
2 REG1 REG CW EXPLICIT MODRM_REG
3 REG2 REG R EXPLICIT MODRM_REG
4 REG3 REG CW EXPLICIT MODRM_REG
5 MEM1 MEM v R EXPLICIT MODRM_RM
6 REG4 REG CW EXPLICIT MODRM_REG
7 REG5 REG R EXPLICIT MODRM_REG

Flag effects (6)

CF = UNDEFINED PF = UNDEFINED AF = UNDEFINED ZF = WRITE SF = UNDEFINED OF = UNDEFINED

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.