CMOVNO

APX APX_F_N3 x86_64

CMOVNO is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category APX. This page lists its 4 encoding forms, distinguished by opcode bytes: 0F, 41.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_CMOVNO_X86_LEGACY_0F_41_721802
rv, rv/mv
X86_LEGACY 41 /r CMOV
XED_CMOVNO_GPRv_GPRv_GPRv_APX_N3
REG0=GPRv_N():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
X86_LEGACY 41 /r APX_F_N3
XED_CMOVNO_GPRv_GPRv_MEMv_APX_N3
REG0=GPRv_N():w:v REG1=GPRv_R():r:v MEM0:r:v
X86_LEGACY 41 /r APX_F_N3
XED_CMOVNO_X86_LEGACY_0F_41_282464
REG0=GPRv_R():cw MEM0:r:v REG0=GPRv_R():cw REG1=GPRv_B():r
X86_LEGACY 41 0F 41 /r CMOV