CMP

BINARY I86 x86_64

CMP is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category BINARY. This page lists its 17 encoding forms, distinguished by opcode bytes: 38, 39, 3A, 3B, 3C, 3D, 80, 81 and 2 more.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_CMP_X86_LEGACY_ONEBYTE_38_608876
r8/m8, r8
X86_LEGACY 38 /r
X86_CMP_X86_LEGACY_ONEBYTE_39_602567
rv/mv, rv
X86_LEGACY 39 /r
X86_CMP_X86_LEGACY_ONEBYTE_3A_238408
r8, r8/m8
X86_LEGACY 3A /r
X86_CMP_X86_LEGACY_ONEBYTE_3B_721802
rv, rv/mv
X86_LEGACY 3B /r
X86_CMP_X86_LEGACY_ONEBYTE_80_944439
r8/m8, imm8
X86_LEGACY 80 /7
X86_CMP_X86_LEGACY_ONEBYTE_81_42157
rv/mv, immv
X86_LEGACY 81 /7
X86_CMP_X86_LEGACY_ONEBYTE_83_595222
rv/mv, imms8
X86_LEGACY 83 /7
XED_CMP_GPR8_GPR8_38
MEM0:r:b REG0=GPR8_R():r REG0=GPR8_B():r REG1=GPR8_R():r
X86_LEGACY 38 38 /r I86
XED_CMP_GPR8_GPR8_3A
REG0=GPR8_R():r MEM0:r:b REG0=GPR8_R():r REG1=GPR8_B():r
X86_LEGACY 3A 3A /r I86
XED_CMP_GPRv_GPRv_39
MEM0:r:v REG0=GPRv_R():r REG0=GPRv_B():r REG1=GPRv_R():r
X86_LEGACY 39 39 /r I86
XED_CMP_GPRv_GPRv_3B
REG0=GPRv_R():r MEM0:r:v REG0=GPRv_R():r REG1=GPRv_B():r
X86_LEGACY 3B 3B /r I86
XED_CMP_MEMb_IMMb_80r7 CMP_GPR8_IMMb_80r7
MEM0:r:b IMM0:r:b:i8 REG0=GPR8_B():r IMM0:r:b:i8
X86_LEGACY 80 80 /7 I86
XED_CMP_MEMb_IMMb_82r7 CMP_GPR8_IMMb_82r7
MEM0:r:b IMM0:r:b:i8 REG0=GPR8_B():r IMM0:r:b:i8
X86_LEGACY 82 82 /7 I86
XED_CMP_X86_LEGACY_ONEBYTE_3C_574444
REG0=XED_REG_AL:r:IMPL IMM0:r:b:i8
X86_LEGACY 3C I86
XED_CMP_X86_LEGACY_ONEBYTE_3D_568266
REG0=OrAX():r:IMPL IMM0:r:z
X86_LEGACY 3D I86
XED_CMP_X86_LEGACY_ONEBYTE_81_799818
MEM0:r:v IMM0:r:z REG0=GPRv_B():r IMM0:r:z
X86_LEGACY 81 81 /7 I86
XED_CMP_X86_LEGACY_ONEBYTE_83_781788
MEM0:r:v IMM0:r:b:i8 REG0=GPRv_B():r IMM0:r:b:i8
X86_LEGACY 83 83 /7 I86