CMPBXADD
MEM0:rw:d:u32 REG0=VGPR32_R():rw:d:u32 REG1=VGPR32_N():r:d:u32
x86_64 X86_LEGACY APX CMPCCXADD source: xed
XED_CMPBXADD_MEMu32_GPR32u32_GPR32u32
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | E2 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 0 |
| requires_mode | long |
| attributes | ATOMIC REQUIRES_ALIGNMENT_4B |
| exception_class | avx-type-14 |
| cpl | 3 |
| raw_encoding | VV1 0xE2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 mode64 |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | d | RW | EXPLICIT | MODRM_RM | |
| 1 | REG0 | REG | d | RW | EXPLICIT | MODRM_REG | |
| 2 | REG1 | REG | d | R | EXPLICIT | MODRM_REG |
Flag effects (6)
CF = WRITE
PF = WRITE
AF = WRITE
ZF = WRITE
SF = WRITE
OF = WRITE
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.