CMPSD

MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:d BASE1=ArDI():rw:SUPP SEG1=FINAL_ESEG1():r:SUPP MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:d BASE1=ArDI():rw:SUPP SEG1=FINAL_ESEG1():r:SUPP MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:d BASE1=ArDI():rw:SUPP SEG1=FINAL_ESEG1():r:SUPP

x86_64 X86_LEGACY STRINGOP I386 source: xed

XED_CMPSD_X86_LEGACY_ONEBYTE_A7_71489

Encoding

encoding_kindX86_LEGACY
opcode_bytesA7 A7 A7
opcode_mapONEBYTE
mandatory_prefix-
has_modrmFalse
requires_modelong
attributesfixed_base0 fixed_base1
cpl3
raw_encoding0xA7 mode16 66_prefix norep OVERRIDE_SEG0() 0xA7 mode32 no66_prefix norep OVERRIDE_SEG0() 0xA7 mode64 norexw_prefix no66_prefix norep norex2_prefix OVERRIDE_SEG0()

Operands (18)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 MEM0 MEM d R SUPPRESSED MODRM_RM
1 BASE0 REG RW SUPPRESSED
2 SEG0 REG R SUPPRESSED
3 MEM1 MEM d R SUPPRESSED MODRM_RM
4 BASE1 REG RW SUPPRESSED
5 SEG1 REG R SUPPRESSED
6 MEM2 MEM d R SUPPRESSED MODRM_RM
7 BASE0 REG RW SUPPRESSED
8 SEG0 REG R SUPPRESSED
9 MEM3 MEM d R SUPPRESSED MODRM_RM
10 BASE1 REG RW SUPPRESSED
11 SEG1 REG R SUPPRESSED
12 MEM4 MEM d R SUPPRESSED MODRM_RM
13 BASE0 REG RW SUPPRESSED
14 SEG0 REG R SUPPRESSED
15 MEM5 MEM d R SUPPRESSED MODRM_RM
16 BASE1 REG RW SUPPRESSED
17 SEG1 REG R SUPPRESSED

Flag effects (7)

CF = WRITE PF = WRITE AF = WRITE ZF = WRITE SF = WRITE DF = READ OF = WRITE

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.