CVTSI2SS
REG0=XMM_R():rw:ss:f32 MEM0:r:d:i32 REG0=XMM_R():rw:ss:f32 REG1=GPR32_B():r:d:i32 REG0=XMM_R():rw:ss:f32 MEM0:r:q:i32 REG0=XMM_R():rw:ss:f32 REG1=GPR64_B():r:q:i32
x86_64 X86_LEGACY CONVERT SSE source: xed
XED_CVTSI2SS_X86_LEGACY_0F_2A_549470
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 2A 0F 2A 0F 2A 0F 2A |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| rex_w | 1 |
| attributes | simd_scalar MXCSR |
| exception_class | SSE_TYPE_3 |
| cpl | 3 |
| raw_encoding | 0x0F 0x2A f3_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] IGNORE66() norexw_prefix MODRM() 0x0F 0x2A f3_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] IGNORE66() norexw_prefix 0x0F 0x2A f3_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] IGNORE66() rexw_prefix MODRM() 0x0F 0x2A f3_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] IGNORE66() rexw_prefix |
Operands (8)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | f32 | RW | EXPLICIT | MODRM_REG | |
| 1 | MEM0 | MEM | d | R | EXPLICIT | MODRM_RM | |
| 2 | REG1 | REG | f32 | RW | EXPLICIT | MODRM_REG | |
| 3 | REG2 | REG | d | R | EXPLICIT | MODRM_REG | |
| 4 | REG3 | REG | f32 | RW | EXPLICIT | MODRM_REG | |
| 5 | MEM1 | MEM | q | R | EXPLICIT | MODRM_RM | |
| 6 | REG4 | REG | f32 | RW | EXPLICIT | MODRM_REG | |
| 7 | REG5 | REG | q | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.