ERETU
REG0=XED_REG_STACKPOP:rw:SUPP:spw5 REG1=XED_REG_CS:w:SUPP:u16 REG2=XED_REG_SS:w:SUPP:u16 REG3=XED_REG_RIP:w:SUPP REG4=XED_REG_RSP:w:SUPP:q:u64 REG5=XED_REG_GSBASE:w:SUPP:u64 REG6=XED_REG_IA32_KERNEL_GS_BASE:w:SUPP:u64
x86_64 X86_LEGACY FRED FRED source: xed
XED_ERETU
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 01 |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /1 | /1 |
| requires_mode | long |
| attributes | NOTSX RING0 |
| cpl | 0 |
| raw_encoding | 0x0F 0x01 MOD[0b11] MOD=3 REG[0b001] RM[0b010] f3_refining_prefix mode64 DF64() |
Operands (7)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | SUPPRESSED | MODRM_REG | ||
| 1 | REG1 | REG | (=CS) | w | W | SUPPRESSED | MODRM_REG |
| 2 | REG2 | REG | (=SS) | w | W | SUPPRESSED | MODRM_REG |
| 3 | REG3 | REG | (=RIP) | w | W | SUPPRESSED | MODRM_REG |
| 4 | REG4 | REG | (=RSP) | w | W | SUPPRESSED | MODRM_REG |
| 5 | REG5 | REG | w | W | SUPPRESSED | MODRM_REG | |
| 6 | REG6 | REG | w | W | SUPPRESSED | MODRM_REG |
Flag effects (9)
CF = SET_0
PF = SET_0
AF = SET_0
ZF = SET_0
SF = SET_0
TF = SET_0
IF = SET_0
DF = SET_0
OF = SET_0
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.