FCOM
REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
x86_64 X86_LEGACY X87_ALU X87 source: xed
XED_FCOM_X86_LEGACY_ONEBYTE_D8_35063
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | D8 DC |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /2 | /2 |
| attributes | NOTSX |
| cpl | 3 |
| raw_encoding | 0xD8 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() 0xDC MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | (=ST0) | f80 | R | IMPLICIT | MODRM_REG |
| 1 | MEM0 | MEM | R | EXPLICIT | MODRM_RM | ||
| 2 | REG1 | REG | w | W | SUPPRESSED | MODRM_REG | |
| 3 | REG2 | REG | (=ST0) | f80 | R | IMPLICIT | MODRM_REG |
| 4 | MEM1 | MEM | R | EXPLICIT | MODRM_RM | ||
| 5 | REG3 | REG | w | W | SUPPRESSED | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.