FCOMP
X87_ALU X87 x86_64
FCOMP is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category X87_ALU. This page lists its 6 encoding forms, distinguished by opcode bytes: D8, DC, DE.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_FCOMP_X86_LEGACY_ONEBYTE_D8_0
(no syntax)
X86_FCOMP_X86_LEGACY_ONEBYTE_D8_10310
st(i)
XED_FCOMP_ST0_X87_DCD1 FCOMP_ST0_X87_DED0
REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
XED_FCOMP_X86_LEGACY_ONEBYTE_D8_173042
REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
XED_FCOMP_X86_LEGACY_ONEBYTE_D8_726281
REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
XED_FCOMP_X86_LEGACY_ONEBYTE_DC_295839
REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP