FSTP

X87_ALU X87 x86_64

FSTP is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category X87_ALU. This page lists its 6 encoding forms, distinguished by opcode bytes: D9, DB, DD, DF.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_FSTP_X86_LEGACY_ONEBYTE_D9_695291
m32fp
X86_LEGACY D9 /3 FPU
X86_FSTP_X86_LEGACY_ONEBYTE_DB_304953
m80fp
X86_LEGACY DB /7 FPU
X86_FSTP_X86_LEGACY_ONEBYTE_DD_10310
st(i)
X86_LEGACY DD FPU
XED_FSTP_X86_LEGACY_ONEBYTE_D9_841780
MEM0:w:mem32real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP MEM0:w:mem80real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP MEM0:w:m64real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
X86_LEGACY D9 DB DD /3 X87
XED_FSTP_X86_LEGACY_ONEBYTE_DD_690117
REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
X86_LEGACY DD /3 X87
XED_FSTP_X87_ST0_DFD0 FSTP_X87_ST0_DFD1
REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
X86_LEGACY DF DF /3 X87