GF2P8AFFINEQB
REG0=XMM_R():rw:dq:u8 REG1=XMM_B():r:dq:u64 IMM0:r:b
x86_64 X86_LEGACY GFNI GFNI source: xed
XED_GF2P8AFFINEQB_XMMu8_XMMu64_IMM8
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | CE |
| opcode_map | 0F3A |
| mandatory_prefix | - |
| has_modrm | True |
| imm_size_bytes | 1 |
| exception_class | SSE_TYPE_4 |
| cpl | 3 |
| raw_encoding | 0x0F 0x3A 0xCE MOD[0b11] MOD=3 REG[rrr] RM[nnn] osz_refining_prefix UIMM8() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 1 | REG1 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | IMM0 | IMM | b | R | EXPLICIT | IMM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.