IMUL
MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP REG0=GPRv_B():r REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
x86_64 X86_LEGACY BINARY I86 source: xed
XED_IMUL_X86_LEGACY_ONEBYTE_F7_693583
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | F7 F7 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /5 | /5 |
| cpl | 3 |
| raw_encoding | 0xF7 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() 0xF7 MOD[0b11] MOD=3 REG[0b101] RM[nnn] |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | v | R | EXPLICIT | MODRM_RM | |
| 1 | REG0 | REG | RW | SUPPRESSED | MODRM_REG | ||
| 2 | REG1 | REG | w | W | SUPPRESSED | MODRM_REG | |
| 3 | REG2 | REG | R | EXPLICIT | MODRM_REG | ||
| 4 | REG3 | REG | RW | SUPPRESSED | MODRM_REG | ||
| 5 | REG4 | REG | w | W | SUPPRESSED | MODRM_REG |
Flag effects (6)
CF = WRITE
PF = UNDEFINED
AF = UNDEFINED
ZF = UNDEFINED
SF = UNDEFINED
OF = WRITE
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.