IMUL
REG0=GPRv_R():rw MEM0:r:v REG0=GPRv_R():rw REG1=GPRv_B():r
x86_64 X86_LEGACY BINARY I86 source: xed
XED_IMUL_X86_LEGACY_0F_AF_32618
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | AF 0F AF |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| cpl | 3 |
| raw_encoding | 0x0F 0xAF MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() 0x0F 0xAF MOD[0b11] MOD=3 REG[rrr] RM[nnn] |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 1 | MEM0 | MEM | v | R | EXPLICIT | MODRM_RM | |
| 2 | REG1 | REG | RW | EXPLICIT | MODRM_REG | ||
| 3 | REG2 | REG | R | EXPLICIT | MODRM_REG |
Flag effects (6)
CF = WRITE
PF = UNDEFINED
AF = UNDEFINED
ZF = UNDEFINED
SF = UNDEFINED
OF = WRITE
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.