IMUL
REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
x86_64 X86_LEGACY BINARY APX_F_N3 source: xed
XED_IMUL_GPRv_APX_N3
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | F7 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /5 | /5 |
| vex_l | 0 |
| requires_mode | long |
| attributes | APX_NF |
| exception_class | APX-EVEX-INT |
| cpl | 3 |
| raw_encoding | EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 UBIT=1 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | v | R | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | RW | SUPPRESSED | MODRM_REG | ||
| 2 | REG2 | REG | w | W | SUPPRESSED | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.