KMOVD
KMASK APX_F_KOPD x86_64
KMOVD is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category KMASK. This page lists its 10 encoding forms, distinguished by opcode bytes: 90, 91, 92, 93.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
XED_KMOVD_GPR32u32_MASKmskw_APX
REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw
XED_KMOVD_GPR32u32_MASKmskw_AVX512 KMOVD_GPR32u32_MASKmskw_AVX512
REG0=VGPR32_R():w:d:u32 REG1=MASK_B():r:mskw REG0=VGPR32_R():w:d:u32 REG1=MASK_B():r:mskw
XED_KMOVD_MASKmskw_GPR32u32_APX
REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32
XED_KMOVD_MASKmskw_GPR32u32_AVX512 KMOVD_MASKmskw_GPR32u32_AVX512
REG0=MASK_R():w:mskw REG1=VGPR32_B():r:d:u32 REG0=MASK_R():w:mskw REG1=VGPR32_B():r:d:u32
XED_KMOVD_MASKmskw_MASKu32_APX
REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u32
XED_KMOVD_MASKmskw_MASKu32_AVX512
REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u32
XED_KMOVD_MASKmskw_MEMu32_APX
REG0=MASK_R():w:mskw MEM0:r:d:u32
XED_KMOVD_MASKmskw_MEMu32_AVX512
REG0=MASK_R():w:mskw MEM0:r:d:u32
XED_KMOVD_MEMu32_MASKmskw_APX
MEM0:w:d:u32 REG0=MASK_R():r:mskw
XED_KMOVD_MEMu32_MASKmskw_AVX512
MEM0:w:d:u32 REG0=MASK_R():r:mskw