LWPINS
REG0=VGPRy_N():w:y MEM0:r:d IMM0:r:d REG0=VGPRy_N():w:y REG1=VGPR32_B():r:d IMM0:r:d
x86_64 X86_LEGACY XOP LWP source: xed
XED_LWPINS_X86_LEGACY_ONEBYTE_12_762003
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 12 12 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /0 | /0 |
| vex_l | 0 |
| attributes | AMDONLY |
| cpl | 3 |
| raw_encoding | XOPV 0x12 VNP VL128 XMAPA MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() UIMM32() XOPV 0x12 VNP VL128 XMAPA MOD[0b11] MOD=3 REG[0b000] RM[nnn] UIMM32() |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | MEM0 | MEM | d | R | EXPLICIT | MODRM_RM | |
| 2 | IMM0 | IMM | d | R | EXPLICIT | IMM | |
| 3 | REG1 | REG | w | W | EXPLICIT | MODRM_REG | |
| 4 | REG2 | REG | d | R | EXPLICIT | MODRM_REG | |
| 5 | IMM1 | IMM | d | R | EXPLICIT | IMM |
Flag effects (1)
CF = WRITE
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.