MAXPS
REG0=XMM_R():rw:ps MEM0:r:ps REG0=XMM_R():rw:ps REG1=XMM_B():r:ps
x86_64 X86_LEGACY SSE SSE source: xed
XED_MAXPS_X86_LEGACY_0F_5F_921063
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 5F 0F 5F |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| attributes | REQUIRES_ALIGNMENT MXCSR |
| exception_class | SSE_TYPE_2 |
| cpl | 3 |
| raw_encoding | 0x0F 0x5F no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() 0x0F 0x5F no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 1 | MEM0 | MEM | R | EXPLICIT | MODRM_RM | ||
| 2 | REG1 | REG | RW | EXPLICIT | MODRM_REG | ||
| 3 | REG2 | REG | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.