MOVD

REG0=XMM_R():w:dq REG1=GPR32_B():r REG0=XMM_R():w:dq REG1=GPR32_B():r REG0=GPR32_B():w REG1=XMM_R():r:d REG0=GPR32_B():w REG1=XMM_R():r:d

x86_64 X86_LEGACY DATAXFER SSE2 source: xed

XED_MOVD_X86_LEGACY_0F_6E_760651

Encoding

encoding_kindX86_LEGACY
opcode_bytes6E 0F 6E 0F 7E 0F 7E
opcode_map0F
mandatory_prefix-
has_modrmTrue
requires_modelong
exception_classSSE_TYPE_5
cpl3
raw_encoding0x0F 0x6E osz_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] REFINING66() mode64 norexw_prefix 0x0F 0x6E osz_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] REFINING66() not64 0x0F 0x7E osz_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] REFINING66() mode64 norexw_prefix 0x0F 0x7E osz_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] REFINING66() not64

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG w W EXPLICIT MODRM_REG
3 REG3 REG R EXPLICIT MODRM_REG
4 REG4 REG w W EXPLICIT MODRM_REG
5 REG5 REG d R EXPLICIT MODRM_REG
6 REG6 REG w W EXPLICIT MODRM_REG
7 REG7 REG d R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.