MOVD
REG0=MMX_R():w:q MEM0:r:d REG0=MMX_R():w:q REG1=GPR32_B():r REG0=MMX_R():w:q MEM0:r:d REG0=MMX_R():w:q REG1=GPR32_B():r MEM0:w:d REG0=MMX_R():r:d REG0=GPR32_B():w REG1=MMX_R():r:d MEM0:w:d REG0=MMX_R():r:d REG0=GPR32_B():w REG1=MMX_R():r:d
x86_64 X86_LEGACY DATAXFER PENTIUMMMX source: xed
XED_MOVD_X86_LEGACY_0F_6E_665171
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 6E 0F 6E 0F 6E 0F 6E 0F 7E 0F 7E 0F 7E 0F 7E |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| requires_mode | long |
| attributes | NOTSX |
| cpl | 3 |
| raw_encoding | 0x0F 0x6E no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] mode64 norexw_prefix MODRM() 0x0F 0x6E no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 norexw_prefix 0x0F 0x6E no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] not64 MODRM() 0x0F 0x6E no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 0x0F 0x7E no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] mode64 norexw_prefix MODRM() 0x0F 0x7E no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 norexw_prefix 0x0F 0x7E no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] not64 MODRM() 0x0F 0x7E no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 |
Operands (16)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | MEM0 | MEM | d | R | EXPLICIT | MODRM_RM | |
| 2 | REG1 | REG | w | W | EXPLICIT | MODRM_REG | |
| 3 | REG2 | REG | R | EXPLICIT | MODRM_REG | ||
| 4 | REG3 | REG | w | W | EXPLICIT | MODRM_REG | |
| 5 | MEM1 | MEM | d | R | EXPLICIT | MODRM_RM | |
| 6 | REG4 | REG | w | W | EXPLICIT | MODRM_REG | |
| 7 | REG5 | REG | R | EXPLICIT | MODRM_REG | ||
| 8 | MEM2 | MEM | w | W | EXPLICIT | MODRM_RM | |
| 9 | REG6 | REG | d | R | EXPLICIT | MODRM_REG | |
| 10 | REG7 | REG | w | W | EXPLICIT | MODRM_REG | |
| 11 | REG8 | REG | d | R | EXPLICIT | MODRM_REG | |
| 12 | MEM3 | MEM | w | W | EXPLICIT | MODRM_RM | |
| 13 | REG9 | REG | d | R | EXPLICIT | MODRM_REG | |
| 14 | REG10 | REG | w | W | EXPLICIT | MODRM_REG | |
| 15 | REG11 | REG | d | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.