OUTSW

REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:w BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:w BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:w BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP

x86_64 X86_LEGACY IOSTRINGOP I186 source: xed

XED_OUTSW_X86_LEGACY_ONEBYTE_6F_823013

Encoding

encoding_kindX86_LEGACY
opcode_bytes6F 6F 6F
opcode_mapONEBYTE
mandatory_prefix-
has_modrmFalse
requires_modelong
attributesfixed_base0 NOTSX
cpl3
raw_encoding0x6F mode16 no66_prefix norep OVERRIDE_SEG0() 0x6F mode32 66_prefix norep OVERRIDE_SEG0() 0x6F mode64 norexw_prefix 66_prefix norep OVERRIDE_SEG0()

Operands (12)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG (=DX) R SUPPRESSED MODRM_REG
1 MEM0 MEM w R SUPPRESSED MODRM_RM
2 BASE0 REG RW SUPPRESSED
3 SEG0 REG R SUPPRESSED
4 REG1 REG (=DX) R SUPPRESSED MODRM_REG
5 MEM1 MEM w R SUPPRESSED MODRM_RM
6 BASE0 REG RW SUPPRESSED
7 SEG0 REG R SUPPRESSED
8 REG2 REG (=DX) R SUPPRESSED MODRM_REG
9 MEM2 MEM w R SUPPRESSED MODRM_RM
10 BASE0 REG RW SUPPRESSED
11 SEG0 REG R SUPPRESSED

Flag effects (1)

DF = READ

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.