PABSD
MMX SSSE3MMX x86_64
PABSD is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category MMX. This page lists its 5 encoding forms, distinguished by opcode byte: 1E.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_PABSD_X86_LEGACY_0F38_1E_898451
xmm, xmm/m128
XED_PABSD_X86_LEGACY_0F38_1E_104975
REG0=XMM_R():w:dq MEM0:r:dq
XED_PABSD_X86_LEGACY_0F38_1E_2422
REG0=MMX_R():w:q MEM0:r:q
XED_PABSD_X86_LEGACY_0F38_1E_651114
REG0=MMX_R():w:q REG1=MMX_B():r:q
XED_PABSD_X86_LEGACY_0F38_1E_823090
REG0=XMM_R():w:dq REG1=XMM_B():r:dq