PACKUSWB

MMX PENTIUMMMX x86_64

PACKUSWB is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category MMX. This page lists its 4 encoding forms, distinguished by opcode bytes: 0F, 67.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_PACKUSWB_X86_LEGACY_0F_67_898451
xmm, xmm/m128
X86_LEGACY 67 /r SSE2
XED_PACKUSWB_X86_LEGACY_0F_67_116928
REG0=MMX_R():rw:q:i16 REG1=MMX_B():r:q:i16
X86_LEGACY 67 /r PENTIUMMMX
XED_PACKUSWB_X86_LEGACY_0F_67_666066
REG0=XMM_R():rw:dq:i16 MEM0:r:dq:i16 REG0=XMM_R():rw:dq:i16 REG1=XMM_B():r:dq:i16
X86_LEGACY 67 0F 67 /r SSE2
XED_PACKUSWB_X86_LEGACY_0F_67_830809
REG0=MMX_R():rw:q:i16 MEM0:r:q:i16
X86_LEGACY 67 /r PENTIUMMMX