PADDW

MMX PENTIUMMMX x86_64

PADDW is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category MMX. This page lists its 4 encoding forms, distinguished by opcode bytes: 0F, FD.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_PADDW_X86_LEGACY_0F_FD_242698
mm, mm/m64
X86_LEGACY FD /r MMX
X86_PADDW_X86_LEGACY_0F_FD_898451
xmm, xmm/m128
X86_LEGACY FD /r SSE2
XED_PADDW_X86_LEGACY_0F_FD_386177
REG0=MMX_R():rw:q MEM0:r:q REG0=MMX_R():rw:q REG1=MMX_B():r:q
X86_LEGACY FD 0F FD /r PENTIUMMMX
XED_PADDW_X86_LEGACY_0F_FD_977188
REG0=XMM_R():rw:dq:i16 MEM0:r:dq:i16 REG0=XMM_R():rw:dq:i16 REG1=XMM_B():r:dq:i16
X86_LEGACY FD 0F FD /r SSE2