PCMPESTRM
SSE SSE42 x86_64
PCMPESTRM is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category SSE. This page lists its 2 encoding forms, distinguished by opcode bytes: 0F, 3A, 60.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_PCMPESTRM_X86_LEGACY_0F3A_60_443601
xmm, xmm/m128, imm8,
XED_PCMPESTRM_X86_LEGACY_0F3A_60_390248
REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:dq:SUPP REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:dq:SUPP REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:dq:SUPP REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:dq:SUPP