PCONFIG

REG0=XED_REG_EAX:rw:SUPP:d:u32 REG1=XED_REG_EBX:crw:SUPP:d:u32 REG2=XED_REG_ECX:crw:SUPP:d:u32 REG3=XED_REG_EDX:crw:SUPP:d:u32 REG0=XED_REG_EAX:rw:SUPP:d:u32 REG1=XED_REG_RBX:crw:SUPP:q:u64 REG2=XED_REG_RCX:crw:SUPP:q:u64 REG3=XED_REG_RDX:crw:SUPP:q:u64

x86_64 X86_LEGACY PCONFIG PCONFIG source: xed

XED_PCONFIG PCONFIG64

Encoding

encoding_kindX86_LEGACY
opcode_bytes01 0F 01
opcode_map0F
mandatory_prefix-
has_modrmTrue
modrm.reg = /0/0
requires_modelong
attributesRING0
cpl0
raw_encoding0x0F 0x01 MOD[0b11] MOD=3 REG[0b000] RM[0b101] no_refining_prefix not64 0x0F 0x01 MOD[0b11] MOD=3 REG[0b000] RM[0b101] no_refining_prefix mode64

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG (=EAX) d RW SUPPRESSED MODRM_REG
1 REG1 REG (=EBX) d R SUPPRESSED MODRM_REG
2 REG2 REG (=ECX) d R SUPPRESSED MODRM_REG
3 REG3 REG (=EDX) d R SUPPRESSED MODRM_REG
4 REG4 REG (=EAX) d RW SUPPRESSED MODRM_REG
5 REG5 REG (=RBX) q R SUPPRESSED MODRM_REG
6 REG6 REG (=RCX) q R SUPPRESSED MODRM_REG
7 REG7 REG (=RDX) q R SUPPRESSED MODRM_REG

Flag effects (6)

CF = SET_0 PF = SET_0 AF = SET_0 ZF = WRITE SF = SET_0 OF = SET_0

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.