PEXTRW

REG0=GPR32_R():w REG1=XMM_B():r:dq IMM0:r:b

x86_64 X86_LEGACY MMX SSE2 source: xed

XED_PEXTRW_X86_LEGACY_0F_C5_730228

Encoding

encoding_kindX86_LEGACY
opcode_bytesC5
opcode_map0F
mandatory_prefix-
has_modrmTrue
imm_size_bytes1
exception_classSSE_TYPE_5
cpl3
raw_encoding0x0F 0xC5 osz_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] REFINING66() UIMM8()

Operands (3)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 IMM0 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.