PMADDUBSW

MMX SSSE3MMX x86_64

PMADDUBSW is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category MMX. This page lists its 4 encoding forms, distinguished by opcode bytes: 04, 0F, 38.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_PMADDUBSW_X86_LEGACY_0F38_04_242698
mm, mm/m64
X86_LEGACY 04 /r SSSE3
X86_PMADDUBSW_X86_LEGACY_0F38_04_898451
xmm, xmm/m128
X86_LEGACY 04 /r SSSE3
XED_PMADDUBSW_X86_LEGACY_0F38_04_578110
REG0=XMM_R():rw:dq:i8 MEM0:r:dq:i8 REG0=XMM_R():rw:dq:i8 REG1=XMM_B():r:dq:i8
X86_LEGACY 04 0F 38 04 /r SSSE3
XED_PMADDUBSW_X86_LEGACY_0F38_04_665633
REG0=MMX_R():rw:q:i8 MEM0:r:q:i8 REG0=MMX_R():rw:q:i8 REG1=MMX_B():r:q:i8
X86_LEGACY 04 0F 38 04 /r SSSE3MMX