PSIGNW

MMX SSSE3MMX x86_64

PSIGNW is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category MMX. This page lists its 4 encoding forms, distinguished by opcode bytes: 09, 0F, 38.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

X86_PSIGNW_X86_LEGACY_0F38_09_242698
mm, mm/m64
X86_LEGACY 09 /r SSSE3
X86_PSIGNW_X86_LEGACY_0F38_09_898451
xmm, xmm/m128
X86_LEGACY 09 /r SSSE3
XED_PSIGNW_X86_LEGACY_0F38_09_800967
REG0=XMM_R():rw:dq MEM0:r:dq REG0=XMM_R():rw:dq REG1=XMM_B():r:dq
X86_LEGACY 09 0F 38 09 /r SSSE3
XED_PSIGNW_X86_LEGACY_0F38_09_883378
REG0=MMX_R():rw:q MEM0:r:q REG0=MMX_R():rw:q REG1=MMX_B():r:q
X86_LEGACY 09 0F 38 09 /r SSSE3MMX