PSLLQ
MMX PENTIUMMMX x86_64
PSLLQ is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category MMX. This page lists its 7 encoding forms, distinguished by opcode bytes: 0F, 73, F3.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_PSLLQ_X86_LEGACY_0F_73_771567
xmm, imm8
X86_PSLLQ_X86_LEGACY_0F_F3_898451
xmm, xmm/m128
XED_PSLLQ_X86_LEGACY_0F_73_282852
REG0=XMM_B():rw:dq:u64 IMM0:r:b
XED_PSLLQ_X86_LEGACY_0F_73_695391
REG0=MMX_B():rw:q:u64 IMM0:r:b
XED_PSLLQ_X86_LEGACY_0F_F3_406363
REG0=XMM_R():rw:dq:u64 MEM0:r:dq:u64
XED_PSLLQ_X86_LEGACY_0F_F3_452249
REG0=XMM_R():rw:dq:u64 REG1=XMM_B():r:dq:u64
XED_PSLLQ_X86_LEGACY_0F_F3_969318
REG0=MMX_R():rw:q:u64 MEM0:r:q REG0=MMX_R():rw:q:u64 REG1=MMX_B():r:q