PUSHA
PUSH I186 x86_64
PUSHA is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category PUSH. This page lists its 2 encoding forms, distinguished by opcode byte: 60.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_PUSHA_X86_LEGACY_ONEBYTE_60_0
(no syntax)
XED_PUSHA_X86_LEGACY_ONEBYTE_60_945793
REG0=XED_REG_STACKPUSH:rw:spw8:SUPP REG1=XED_REG_AX:r:SUPP REG2=XED_REG_CX:r:SUPP REG3=XED_REG_DX:r:SUPP REG4=XED_REG_BX:r:SUPP REG5=XED_REG_SP:r:SUPP REG6=XED_REG_BP:r:SUPP REG7=XED_REG_SI:r:SUPP REG8=XED_REG_DI:r:SUPP REG0=XED_REG_STACKPUSH:rw:spw8:SUPP REG1=XED_REG_AX:r:SUPP REG2=XED_REG_CX:r:SUPP REG3=XED_REG_DX:r:SUPP REG4=XED_REG_BX:r:SUPP REG5=XED_REG_SP:r:SUPP REG6=XED_REG_BP:r:SUPP REG7=XED_REG_SI:r:SUPP REG8=XED_REG_DI:r:SUPP