REPE_SCASW

REG0=XED_REG_AX:r:SUPP MEM0:cr:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG1=ArCX():rcw:SUPP REG0=XED_REG_AX:r:SUPP MEM0:cr:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG1=ArCX():rcw:SUPP REG0=XED_REG_AX:r:SUPP MEM0:cr:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG1=ArCX():rcw:SUPP

x86_64 X86_LEGACY STRINGOP I86 source: xed

XED_REPE_SCASW_X86_LEGACY_ONEBYTE_AF_38730

Encoding

encoding_kindX86_LEGACY
opcode_bytesAF AF AF
opcode_mapONEBYTE
mandatory_prefix-
has_modrmFalse
requires_modelong
attributesREP fixed_base0
cpl3
raw_encoding0xAF mode16 no66_prefix repe 0xAF mode32 66_prefix repe 0xAF mode64 norexw_prefix 66_prefix repe norex2_prefix

Operands (15)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG (=AX) R SUPPRESSED MODRM_REG
1 MEM0 MEM w CR SUPPRESSED MODRM_RM
2 BASE0 REG R SUPPRESSED
3 SEG0 REG R SUPPRESSED
4 REG1 REG R SUPPRESSED MODRM_REG
5 REG2 REG (=AX) R SUPPRESSED MODRM_REG
6 MEM1 MEM w CR SUPPRESSED MODRM_RM
7 BASE0 REG R SUPPRESSED
8 SEG0 REG R SUPPRESSED
9 REG3 REG R SUPPRESSED MODRM_REG
10 REG4 REG (=AX) R SUPPRESSED MODRM_REG
11 MEM2 MEM w CR SUPPRESSED MODRM_RM
12 BASE0 REG R SUPPRESSED
13 SEG0 REG R SUPPRESSED
14 REG5 REG R SUPPRESSED MODRM_REG

Flag effects (7)

CF = WRITE PF = WRITE AF = WRITE ZF = READWRITE SF = WRITE DF = READ OF = WRITE

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.