REP_INSD
MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP REG1=ArCX():rcw:SUPP
x86_64 X86_LEGACY IOSTRINGOP I386 source: xed
XED_REP_INSD_X86_LEGACY_ONEBYTE_6D_901417
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 6D 6D 6D 6D 6D 6D 6D 6D |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | False |
| rex_w | 1 |
| requires_mode | long |
| attributes | REP fixed_base0 NOTSX |
| cpl | 3 |
| raw_encoding | 0x6D mode16 66_prefix repe 0x6D mode32 no66_prefix repe 0x6D mode64 norexw_prefix no66_prefix repe 0x6D mode64 rexw_prefix repe 0x6D mode16 66_prefix repne 0x6D mode32 no66_prefix repne 0x6D mode64 norexw_prefix no66_prefix repne 0x6D mode64 rexw_prefix repne |
Operands (40)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 1 | BASE0 | REG | R | SUPPRESSED | |||
| 2 | SEG0 | REG | R | SUPPRESSED | |||
| 3 | REG0 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 4 | REG1 | REG | R | SUPPRESSED | MODRM_REG | ||
| 5 | MEM1 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 6 | BASE0 | REG | R | SUPPRESSED | |||
| 7 | SEG0 | REG | R | SUPPRESSED | |||
| 8 | REG2 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 9 | REG3 | REG | R | SUPPRESSED | MODRM_REG | ||
| 10 | MEM2 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 11 | BASE0 | REG | R | SUPPRESSED | |||
| 12 | SEG0 | REG | R | SUPPRESSED | |||
| 13 | REG4 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 14 | REG5 | REG | R | SUPPRESSED | MODRM_REG | ||
| 15 | MEM3 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 16 | BASE0 | REG | R | SUPPRESSED | |||
| 17 | SEG0 | REG | R | SUPPRESSED | |||
| 18 | REG6 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 19 | REG7 | REG | R | SUPPRESSED | MODRM_REG | ||
| 20 | MEM4 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 21 | BASE0 | REG | R | SUPPRESSED | |||
| 22 | SEG0 | REG | R | SUPPRESSED | |||
| 23 | REG8 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 24 | REG9 | REG | R | SUPPRESSED | MODRM_REG | ||
| 25 | MEM5 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 26 | BASE0 | REG | R | SUPPRESSED | |||
| 27 | SEG0 | REG | R | SUPPRESSED | |||
| 28 | REG10 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 29 | REG11 | REG | R | SUPPRESSED | MODRM_REG | ||
| 30 | MEM6 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 31 | BASE0 | REG | R | SUPPRESSED | |||
| 32 | SEG0 | REG | R | SUPPRESSED | |||
| 33 | REG12 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 34 | REG13 | REG | R | SUPPRESSED | MODRM_REG | ||
| 35 | MEM7 | MEM | d | CW | SUPPRESSED | MODRM_RM | |
| 36 | BASE0 | REG | R | SUPPRESSED | |||
| 37 | SEG0 | REG | R | SUPPRESSED | |||
| 38 | REG14 | REG | (=DX) | R | SUPPRESSED | MODRM_REG | |
| 39 | REG15 | REG | R | SUPPRESSED | MODRM_REG |
Flag effects (1)
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.