REP_MONTMUL
REG0=XED_REG_EAX:rw:SUPP \ REG1=XED_REG_ECX:rw:SUPP \ REG2=XED_REG_EDX:w:SUPP \ MEM0:rw:SUPP:pmmsz16 \ BASE0=ArSI():r:SUPP \ SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_EAX:rw:SUPP \ REG1=XED_REG_ECX:rw:SUPP \ REG2=XED_REG_EDX:w:SUPP \ MEM0:rw:SUPP:pmmsz32 \ BASE0=ArSI():r:SUPP \ SEG0=FINAL_ESEG():r:SUPP
x86_64 X86_LEGACY VIA_PADLOCK VIA_PADLOCK_MONTMUL source: xed
XED_REP_MONTMUL_X86_LEGACY_0F_A6_147367
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | A6 0F A6 |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /0 | /0 |
| attributes | REP FIXED_BASE0 |
| cpl | 3 |
| raw_encoding | 0x0F 0xA6 MOD[0b11] REG[0b000] RM[0b000] f3_refining_prefix eamode16 0x0F 0xA6 MOD[0b11] REG[0b000] RM[0b000] f3_refining_prefix eamode32 |
Operands (22)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | (=EAX) | RW | SUPPRESSED | MODRM_REG | |
| 1 | \ | REG | R | EXPLICIT | |||
| 2 | REG1 | REG | (=ECX) | RW | SUPPRESSED | MODRM_REG | |
| 3 | \ | REG | R | EXPLICIT | |||
| 4 | REG2 | REG | (=EDX) | w | W | SUPPRESSED | MODRM_REG |
| 5 | \ | REG | R | EXPLICIT | |||
| 6 | MEM0 | MEM | RW | SUPPRESSED | MODRM_RM | ||
| 7 | \ | REG | R | EXPLICIT | |||
| 8 | BASE0 | REG | R | SUPPRESSED | |||
| 9 | \ | REG | R | EXPLICIT | |||
| 10 | SEG0 | REG | R | SUPPRESSED | |||
| 11 | REG3 | REG | (=EAX) | RW | SUPPRESSED | MODRM_REG | |
| 12 | \ | REG | R | EXPLICIT | |||
| 13 | REG4 | REG | (=ECX) | RW | SUPPRESSED | MODRM_REG | |
| 14 | \ | REG | R | EXPLICIT | |||
| 15 | REG5 | REG | (=EDX) | w | W | SUPPRESSED | MODRM_REG |
| 16 | \ | REG | R | EXPLICIT | |||
| 17 | MEM1 | MEM | RW | SUPPRESSED | MODRM_RM | ||
| 18 | \ | REG | R | EXPLICIT | |||
| 19 | BASE0 | REG | R | SUPPRESSED | |||
| 20 | \ | REG | R | EXPLICIT | |||
| 21 | SEG0 | REG | R | SUPPRESSED |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.