SHR
MEM0:rw:b IMM0:r:b REG0=GPR8_B():rw IMM0:r:b
x86_64 X86_LEGACY SHIFT I186 source: xed
XED_SHR_X86_LEGACY_ONEBYTE_C0_432346
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | C0 C0 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /5 | /5 |
| imm_size_bytes | 1 |
| attributes | BYTEOP |
| cpl | 3 |
| raw_encoding | 0xC0 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() UIMM8() 0xC0 MOD[0b11] MOD=3 REG[0b101] RM[nnn] UIMM8() |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | b | RW | EXPLICIT | MODRM_RM | |
| 1 | IMM0 | IMM | b | R | EXPLICIT | IMM | |
| 2 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 3 | IMM1 | IMM | b | R | EXPLICIT | IMM |
Flag effects (6)
CF = WRITE
PF = WRITE
AF = UNDEFINED
ZF = WRITE
SF = WRITE
OF = UNDEFINED
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.