TEST
LOGICAL I86 x86_64
TEST is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category LOGICAL. This page lists its 12 encoding forms, distinguished by opcode bytes: 84, 85, A8, A9, F6, F7.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_TEST_X86_LEGACY_ONEBYTE_F6_944439
r8/m8, imm8
X86_TEST_X86_LEGACY_ONEBYTE_F7_42157
rv/mv, immv
XED_TEST_MEMb_IMMb_F6r0 TEST_GPR8_IMMb_F6r0
MEM0:r:b IMM0:r:b:i8 REG0=GPR8_B():r IMM0:r:b:i8
XED_TEST_MEMb_IMMb_F6r1 TEST_GPR8_IMMb_F6r1
MEM0:r:b IMM0:r:b:i8 REG0=GPR8_B():r IMM0:r:b:i8
XED_TEST_MEMv_IMMz_F7r0 TEST_GPRv_IMMz_F7r0
MEM0:r:v IMM0:r:z REG0=GPRv_B():r IMM0:r:z
XED_TEST_MEMv_IMMz_F7r1 TEST_GPRv_IMMz_F7r1
MEM0:r:v IMM0:r:z REG0=GPRv_B():r IMM0:r:z
XED_TEST_X86_LEGACY_ONEBYTE_84_499517
REG0=GPR8_B():r REG1=GPR8_R():r
XED_TEST_X86_LEGACY_ONEBYTE_84_741593
MEM0:r:b REG0=GPR8_R():r
XED_TEST_X86_LEGACY_ONEBYTE_85_2046
REG0=GPRv_B():r REG1=GPRv_R():r
XED_TEST_X86_LEGACY_ONEBYTE_85_265343
MEM0:r:v REG0=GPRv_R():r
XED_TEST_X86_LEGACY_ONEBYTE_A8_695195
REG0=XED_REG_AL:r:IMPL IMM0:r:b:i8
XED_TEST_X86_LEGACY_ONEBYTE_A9_279686
REG0=OrAX():r:IMPL IMM0:r:z