TZCNT
BMI1 APX_F_BMI1 x86_64
TZCNT is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category BMI1. This page lists its 6 encoding forms, distinguished by opcode bytes: 0F, BC, F4.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_TZCNT_X86_LEGACY_0F_BC_721802
rv, rv/mv
XED_TZCNT_GPRv_GPRv_APX
REG0=GPRv_R():w:v REG1=GPRv_B():r:v
XED_TZCNT_GPRv_GPRv_APX_N3
REG0=GPRv_R():w:v REG1=GPRv_B():r:v
XED_TZCNT_GPRv_MEMv_APX
REG0=GPRv_R():w:v MEM0:r:v
XED_TZCNT_GPRv_MEMv_APX_N3
REG0=GPRv_R():w:v MEM0:r:v
XED_TZCNT_X86_LEGACY_0F_BC_448649
REG0=GPRv_R():w MEM0:r:v REG0=GPRv_R():w REG1=GPRv_B():r