UIRET
REG0=rIP():w:SUPP REG1=XED_REG_STACKPOP:rw:SUPP:spw
x86_64 X86_LEGACY UINTR UINTR source: xed
XED_UIRET
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 01 |
| opcode_map | 0F |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /5 | /5 |
| requires_mode | long |
| cpl | 3 |
| raw_encoding | 0x0F 0x01 MOD[0b11] MOD=3 REG[0b101] RM[0b100] f3_refining_prefix mode64 |
Operands (2)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | SUPPRESSED | MODRM_REG | |
| 1 | REG1 | REG | RW | SUPPRESSED | MODRM_REG |
Flag effects (6)
CF = WRITE
PF = WRITE
AF = WRITE
ZF = WRITE
SF = WRITE
OF = WRITE
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.