VAESENC
REG0=XMM_R():w:dq REG1=XMM_N():r:dq REG2=XMM_B():r:dq REG0=XMM_R():w:dq REG1=XMM_N():r:dq MEM0:r:dq
x86_64 X86_LEGACY AES AVXAES source: xed
XED_VAESENC_X86_LEGACY_ONEBYTE_DC_286920
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | DC DC |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 0 |
| exception_class | avx-type-4 |
| cpl | 3 |
| raw_encoding | VV1 0xDC V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 VV1 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG2 | REG | R | EXPLICIT | MODRM_REG | ||
| 3 | REG3 | REG | w | W | EXPLICIT | MODRM_REG | |
| 4 | REG4 | REG | R | EXPLICIT | MODRM_REG | ||
| 5 | MEM0 | MEM | R | EXPLICIT | MODRM_RM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.