VBROADCASTI32X2

BROADCAST AVX512DQ_128 x86_64

6 encoding forms.

XED_VBROADCASTI32X2_XMMu32_MASKmskw_MEMu32_AVX512
REG0=XMM_R3():w:dq:u32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:q:u32 EMX_BROADCAST_2TO4_32
X86_LEGACY 59 /r AVX512DQ_128
XED_VBROADCASTI32X2_XMMu32_MASKmskw_XMMu32_AVX512
REG0=XMM_R3():w:dq:u32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:u32 EMX_BROADCAST_2TO4_32
X86_LEGACY 59 /r AVX512DQ_128
XED_VBROADCASTI32X2_YMMu32_MASKmskw_MEMu32_AVX512
REG0=YMM_R3():w:qq:u32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:q:u32 EMX_BROADCAST_2TO8_32
X86_LEGACY 59 /r AVX512DQ_256
XED_VBROADCASTI32X2_YMMu32_MASKmskw_XMMu32_AVX512
REG0=YMM_R3():w:qq:u32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:u32 EMX_BROADCAST_2TO8_32
X86_LEGACY 59 /r AVX512DQ_256
XED_VBROADCASTI32X2_ZMMu32_MASKmskw_MEMu32_AVX512
REG0=ZMM_R3():w:zu32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:q:u32 EMX_BROADCAST_2TO16_32
X86_LEGACY 59 /r AVX512DQ_512
XED_VBROADCASTI32X2_ZMMu32_MASKmskw_XMMu32_AVX512
REG0=ZMM_R3():w:zu32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:u32 EMX_BROADCAST_2TO16_32
X86_LEGACY 59 /r AVX512DQ_512