VCVT2PH2HF8S

REG0=YMM_R3():w:qq:hf8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:f16 REG3=YMM_B3():r:qq:f16

x86_64 X86_LEGACY CONVERT AVX512_FP8_CONVERT_256 source: xed

XED_VCVT2PH2HF8S_YMMhf8_MASKmskw_YMMf16_YMMf16_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes1B
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesFIXED_ROUNDING_RNE MASKOP_EVEX
exception_classAVX512-E4NF
cpl3
raw_encodingEVV 0x1B VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 VL256

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 REG3 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.