VCVTHF82PH

CONVERT AVX512_FP8_CONVERT_128 x86_64

6 encoding forms.

XED_VCVTHF82PH_XMMf16_MASKmskw_MEMhf8_AVX512
REG0=XMM_R3():w:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:q:hf8
X86_LEGACY 1E /r AVX512_FP8_CONVERT_128
XED_VCVTHF82PH_XMMf16_MASKmskw_XMMhf8_AVX512
REG0=XMM_R3():w:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:hf8
X86_LEGACY 1E /r AVX512_FP8_CONVERT_128
XED_VCVTHF82PH_YMMf16_MASKmskw_MEMhf8_AVX512
REG0=YMM_R3():w:qq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:dq:hf8
X86_LEGACY 1E /r AVX512_FP8_CONVERT_256
XED_VCVTHF82PH_YMMf16_MASKmskw_XMMhf8_AVX512
REG0=YMM_R3():w:qq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:hf8
X86_LEGACY 1E /r AVX512_FP8_CONVERT_256
XED_VCVTHF82PH_ZMMf16_MASKmskw_MEMhf8_AVX512
REG0=ZMM_R3():w:zf16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:qq:hf8
X86_LEGACY 1E /r AVX512_FP8_CONVERT_512
XED_VCVTHF82PH_ZMMf16_MASKmskw_YMMhf8_AVX512
REG0=ZMM_R3():w:zf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:hf8
X86_LEGACY 1E /r AVX512_FP8_CONVERT_512