VCVTPH2W

CONVERT AVX512_FP16_128 x86_64

6 encoding forms.

XED_VCVTPH2W_XMMi16_MASKmskw_MEMf16_AVX512
REG0=XMM_R3():w:dq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f16:TXT=BCASTSTR
X86_LEGACY 7D /r AVX512_FP16_128
XED_VCVTPH2W_XMMi16_MASKmskw_XMMf16_AVX512
REG0=XMM_R3():w:dq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:f16
X86_LEGACY 7D /r AVX512_FP16_128
XED_VCVTPH2W_YMMi16_MASKmskw_MEMf16_AVX512
REG0=YMM_R3():w:qq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f16:TXT=BCASTSTR
X86_LEGACY 7D /r AVX512_FP16_256
XED_VCVTPH2W_YMMi16_MASKmskw_YMMf16_AVX512
REG0=YMM_R3():w:qq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:f16
X86_LEGACY 7D /r AVX512_FP16_256
XED_VCVTPH2W_ZMMi16_MASKmskw_MEMf16_AVX512
REG0=ZMM_R3():w:zi16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f16:TXT=BCASTSTR
X86_LEGACY 7D /r AVX512_FP16_512
XED_VCVTPH2W_ZMMi16_MASKmskw_ZMMf16_AVX512
REG0=ZMM_R3():w:zi16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf16
X86_LEGACY 7D /r AVX512_FP16_512