VCVTPS2DQ

CONVERT AVX512F_128 x86_64

7 encoding forms.

XED_VCVTPS2DQ_X86_LEGACY_ONEBYTE_5B_336689
REG0=XMM_R():w:dq:i32 MEM0:r:dq:f32 REG0=XMM_R():w:dq:i32 REG1=XMM_B():r:dq:f32 REG0=YMM_R():w:qq:i32 MEM0:r:qq:f32 REG0=YMM_R():w:qq:i32 REG1=YMM_B():r:qq:f32
X86_LEGACY 5B 5B 5B 5B /r AVX
XED_VCVTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512
REG0=XMM_R3():w:dq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f32:TXT=BCASTSTR
X86_LEGACY 5B /r AVX512F_128
XED_VCVTPS2DQ_XMMi32_MASKmskw_XMMf32_AVX512
REG0=XMM_R3():w:dq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:f32
X86_LEGACY 5B /r AVX512F_128
XED_VCVTPS2DQ_YMMi32_MASKmskw_MEMf32_AVX512
REG0=YMM_R3():w:qq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f32:TXT=BCASTSTR
X86_LEGACY 5B /r AVX512F_256
XED_VCVTPS2DQ_YMMi32_MASKmskw_YMMf32_AVX512
REG0=YMM_R3():w:qq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:f32
X86_LEGACY 5B /r AVX512F_256
XED_VCVTPS2DQ_ZMMi32_MASKmskw_MEMf32_AVX512
REG0=ZMM_R3():w:zi32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f32:TXT=BCASTSTR
X86_LEGACY 5B /r AVX512F_512
XED_VCVTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512
REG0=ZMM_R3():w:zi32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32
X86_LEGACY 5B /r AVX512F_512