VCVTPS2PH

CONVERT AVX512F_128 x86_64

7 encoding forms.

XED_VCVTPS2PH_MEMf16_MASKmskw_XMMf32_IMM8_AVX512
MEM0:w:q:f16 REG0=MASK1():r:mskw REG1=XMM_R3():r:dq:f32 IMM0:r:b
X86_LEGACY 1D /r AVX512F_128
XED_VCVTPS2PH_MEMf16_MASKmskw_YMMf32_IMM8_AVX512
MEM0:w:dq:f16 REG0=MASK1():r:mskw REG1=YMM_R3():r:qq:f32 IMM0:r:b
X86_LEGACY 1D /r AVX512F_256
XED_VCVTPS2PH_MEMf16_MASKmskw_ZMMf32_IMM8_AVX512
MEM0:w:qq:f16 REG0=MASK1():r:mskw REG1=ZMM_R3():r:zf32 IMM0:r:b
X86_LEGACY 1D /r AVX512F_512
XED_VCVTPS2PH_X86_LEGACY_ONEBYTE_1D_915951
MEM0:w:q:f16 REG0=XMM_R():r:dq:f32 IMM0:r:b REG0=XMM_B():w:q:f16 REG1=XMM_R():r:dq:f32 IMM0:r:b MEM0:w:dq:f16 REG0=YMM_R():r:qq:f32 IMM0:r:b REG0=XMM_B():w:dq:f16 REG1=YMM_R():r:qq:f32 IMM0:r:b
X86_LEGACY 1D 1D 1D 1D /r F16C
XED_VCVTPS2PH_XMMf16_MASKmskw_XMMf32_IMM8_AVX512
REG0=XMM_B3():w:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_R3():r:dq:f32 IMM0:r:b
X86_LEGACY 1D /r AVX512F_128
XED_VCVTPS2PH_XMMf16_MASKmskw_YMMf32_IMM8_AVX512
REG0=XMM_B3():w:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_R3():r:qq:f32 IMM0:r:b
X86_LEGACY 1D /r AVX512F_256
XED_VCVTPS2PH_YMMf16_MASKmskw_ZMMf32_IMM8_AVX512
REG0=YMM_B3():w:qq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_R3():r:zf32 IMM0:r:b
X86_LEGACY 1D /r AVX512F_512